IBIS Macromodel Task Group

Meeting date: 07 December 2010

Members (asterisk for those attending):
Agilent:                    * Fangyi Rao
                            * Radek Biernacki
Ansoft:                       Chris Herrick
                              Danil Kirsanov
Ansys:                      * Samuel Mertens
                            * Dan Dvorjak
                              Deepak Ramaswamy
Cadence Design Systems:       Terry Jernberg
                            * Ambrish Varma
Celsionix:                    Kellee Crisafulli
Cisco Systems:              * Mike LaBonte
                              Stephen Scearce
			      Ashwin Vasudevan
Ericsson:                   * Anders Ekholm
IBM:                          Greg Edlund
Intel:                        Michael Mirmak
LSI Logic:                    Wenyi Jin
Mentor Graphics:            * John Angulo
                            * Vladimir Dmitriev-Zdorov
                              Zhen Mu
                            * Arpad Muranyi
Micron Technology:            Randy Wolff
Nokia-Siemens Networks:       Eckhard Lenski
Sigrity:                      Brad Brim
                              Kumar Keshavan
                              Ken Willis
SiSoft:                     * Walter Katz
                              Mike Steinberger
                            * Todd Westerhoff
ST Micro:                     Syed Sadeghi
Teraspeed Consulting Group: * Scott McMorrow
                            * Bob Ross
TI:                           Casey Morrison
                            * Alfred Chong
Vitesse Semiconductor:        Eric Sweetman
Xilinx:                       Mustansir Fanaswalla

The meeting was lead by Arpad Muranyi

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Opens:

- Arpad: We will meet Dec 14, Dec 21, and Jan 4, but not Dec 28

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Call for patent disclosure:

- none

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Review of ARs:

- Arpad: Update Version BIRD
  - Done, draft 3 posted

- Arpad: Update Typos BIRD
  - Done
  - Includes comments from Fangyi

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New Discussion:

Arpad showed the Version BIRD:
- Arpad: Are we ready to vote?
  - Would prefer to avoid discussion in this call
- Mike: The Analysis section does not make clear what will go wrong without
  this BIRD
- Arpad: Then we should discuss by email then, and not vote now
- Ken: Who is the major proponent?
  - Are Walter and Ken in agreement?
- Todd: We have mostly resolved our differences
- Bob: I'm OK with this BIRD
  - The Version number type should be an enumerated list
  - We can change editorially when we adopt this
- Radek: We don't need to say the version is 5.0 if AMI_Version is absent

Arpad showed the Typos BIRD:
- Arpad: We got stuck on the tree syntax section
  - Mike Steinberger had said some text belongs in a separate document
  - We need to describe what is allowed in the parameter string
- Bob: Disagree that some parts are just "how to" and don't belong
  - The spec has to be complete
  - Terminology issues:
    - For example is the word "Type" a leaf?
- Arpad: The word Type and the value next to it are the leaf
- Bob: We are making a recursive reference to section 10
  - We should keep the string contents description
- Arpad: We will keep the section
  - Radek's comment is not included yet

Walter showed sample SPICE code and Equiv Circuit Analog Model Params:
- The stimulus sources are not IBIS-ISS, they are SPICE
- They send a step signal into the test fixture
- HSPICE tends to change time-step dynamically, resistor to ground added
- The channel is a W-line
- The Rx RC circuit is parameterized
- Arpad: Will the BIRD have Voh and Vol for the driver?
- Walter: No
  - This is just to generate an impulse response
- Scott: This uses a lumped circuit to generate an ideal driver
  - Everything is at the same space and time
- Walter: This is an IBIS model with:
  - no diff term
  - no C_comp
  - linear I/V
- Ambrish: Why not let vendors use IBIS models?
- Walter: Every Tx has a "framis" in it (a knob)
  - Every framis setting has an impedance on the Tx
  - It may need 128 [Model Selector]s in regular IBIS
  - Parameters make it much easier
- Vladimir: The triangles in the diagram are not in the circuit
- Walter: The triangles will be removed
- Vladimir: It should have Tr and Tf parameterized
- Walter: For a differential they have to be the same
  - It is for odd mode only
  - How do we generate a model when there is an s4p at the beginning and an s4p
    at the end
  - Matlab is commonly used with daisy chained s4ps
  - They would like to distribute them as AMI files

Walter showed a presentation:
- Slide 1:
  - The network on the left only has to be LTI
  - It is connected to an external network
   - Scott: Where does Z0 come from?
   - Walter: It is the on-die network ref impedance
   - Scott: Is the termination on-die or external?
   - Fangyi: The termination network is not included in Z0
   - Todd: The question is whether the term is at nodes 2/4 or 1/3
     - None of the energy at port 2 will make it to 1
   - Scott: In a real network there is a path from 2 to 1
   - Arpad: Walter should get to his next two slides
   - Walter: EDA tools provide the ext network
- Slide 3:
  - These transfer function represent an LTI system
  - Nodes correspond to the circuit diagrams
  - S12 is not important because it is the back reflection
  - G and H are just "some" transfer functions
  - And inverse Fourier will get the transfer function
  - Scott: It assumes zero time delay
    - The impedance at the exit port matters
    - Internal s-param reflections require solution
  - Walter: The vendor says this is the only required math
- Scott: When the electrical length becomes non-negligible the assumption
  falls apart
- Todd: I can't agree on that fundamental assumption
- Walter: The vendor is specifying this
- Scott: This is a spec and we need to get it right
  - Take out the s-param terms for a 25 ohm channel and you get the wrong
    solution
- Bob: Will this model support a 4 port model completely filled in?
- Walter: It ignores some ports
  - It doesn't use S12
- Arpad: The question is if we can use an incomplete s-param model
- Vladimir: The derivations we see here become invalid
  - Building the s-param is the vendor's business
  - But we should not make assumptions
  - We need to add the SPICE netlist to show how to include the s-param
- Walter: They do not use SPICE
- Vladimir: The SPICE is just to see the Z0s, not to derive
  - Vendors need to understand how we will use the matrix
- Arpad: Is this just one way of using it?
- Todd: If both the s-param ref and Z0 are 50 won't there be no reflection?
- Fangyi: It has to do with how you characterize the external network
- Walter: You can always convert it to the same Z0 arithmetically
- Todd: Is the reflected energy zero if perfectly terminated?
- Scott: This confuses the on-die network with the s-param
  - If it were an R network, we would be double counting
- Todd: So Z0 on the left is not what the reflected wave sees
- Bob: Is z0 a real termination?
- Fangyi: It is the reference impedance
- Todd: Z0 can't be the termination
- Walter: All the reflection happens at port 2
- Scott: A 2 port would be easier to understand
  - Put R to gnd at port 1
  - See if it works
- Radek: This tries to characterize behavior with 1 transfer function
  - It is well defined if you know how to terminate it
  - Otherwise there is a problem
- Walter: It appears everyone disagrees with this formulation
- Vladimir: It would be unambiguous if we had the SPICE netlist
- Todd: It is not clear that would be tool independent
  - It isn't that simple
- Walter: Generating SPICE implies it has to work in SPICE
- Vladimir: Not really
- Walter: The SPICE circuit is simple
- Vladimir: For this S11 would have to be 0
- Walter: Or -100dB
- Vladimir: The Z0 on the left is not needed
- Walter: Agree
  - Voltage swing had to be doubled for those
- Vladimir: Do vendors agree with this?
- Walter: Yes
- Scott: It can't handle any delay
  - This is non-causal
- Vladimir: It is causal
- Arpad: Will this be a hard-coded circuit in our spec?
- Ken: Hard to see why we would have hard-coded models for a specific vendor
- Arpad: If we want a general purpose solution using IBIS-ISS, none of this
  discussion matters
  - Do we want to hard-code this as a common case?
- Walter: A number of vendors do it this way
  - The AMI file can call out an IBIS-ISS circuit
  - But they may not do it if that is required
  - These two hard-coded circuits should be specified
- Arpad: It should specify that the s-params not have certain portions
  - Do we really want to specify this specific setup?
- Todd: We are all already using these
  - We had discussed the idea of having canned templates
  - This is based on Arpad's BIRDs
- Scott: The problem is non-standard use of s-params
  - Removing half the matrix is not standard
  - This should not be called a TS file if it is not standard
- Walter: TS is just a format, just data
- Todd: Maybe we should call it something else
  - Maybe db-on-die
  - The reason to use a template is because it's convenient and common
- Scott: It is a poor approximation of reality
- Ken: This may not port to higher date rates
  - General is better
- Todd: The s-param problem will still be there
  - The vendors are convinced this works
- Arpad: This could make the spec change take a long time
- Walter: This work is from 2009
  - Nothing short term will change it
- Scott: It's OK to have s-params with zero terms, but don't make it a template
- Todd: Then we only need not explicitly say to zero out the terms
- Scott: It won't work, not knowing what the term impedance will be

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Next meeting: 14 December 2010 12:00pm PT

Next agenda:
1) Typos BIRD draft
2) Version BIRD draft
3) BIRD 121-124 discussions

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IBIS Interconnect SPICE Wish List:

1) Simulator directives

